This is just a nitpicking question. Do Intel chips still have some space/transistors dedicated to SSE3? If they do, why can’t they implement SSE3 by other, more powerful instrutions (like AVX) to save die space?
This is just a nitpicking question. Do Intel chips still have some space/transistors dedicated to SSE3? If they do, why can’t they implement SSE3 by other, more powerful instrutions (like AVX) to save die space?
No, no CPU has seperate FPUs for SSE & AVX - it’s compiled to the same set of uOps by microcode.
Recent x86 CPUs go as far as implementing x87 in the 128b FPU too.