imaginary_num6er@alien.topB to HardwareEnglish · 2 years agoRapidus to Develop 1nm Process Technology With Leti and the University of Tokyowww.tomshardware.comexternal-linkmessage-square9linkfedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkRapidus to Develop 1nm Process Technology With Leti and the University of Tokyowww.tomshardware.comimaginary_num6er@alien.topB to HardwareEnglish · 2 years agomessage-square9linkfedilink
minus-squareQuatro_Leches@alien.topBlinkfedilinkEnglisharrow-up1·2 years agoWhat does the nm mean here tho? Diameter of a silicon atom is about 0…25 nm
minus-squareAnimeAlt44@alien.topBlinkfedilinkEnglisharrow-up1·2 years agoAt this point it just refers to ‘next generations after 2nm’. Not only does the process obviously not exist, they haven’t decided on what transistor structure to use either whether GAAFET or a successor.
minus-squareResponsibleJudge3172@alien.topBlinkfedilinkEnglisharrow-up1·2 years agoIt means density of transistors per square mm in relation to TSMC N3 (‘3nm’) and N2 (‘2nm’
What does the nm mean here tho? Diameter of a silicon atom is about 0…25 nm
At this point it just refers to ‘next generations after 2nm’. Not only does the process obviously not exist, they haven’t decided on what transistor structure to use either whether GAAFET or a successor.
It means density of transistors per square mm in relation to TSMC N3 (‘3nm’) and N2 (‘2nm’