The controllers can thermal throttle from sustained activity if not enough cooling capacity or thermal sink available. Most of them are just ARM CPUs at the end of the day.
However, things like this AIO nonsense is just that. No consumer product will ever be used for such sustained loads to require something like this. Those who do have far better cooling options to choose from and they will cool more than just a single drive.
Phils Computer Lab has a much more extensive series of videos about all the topics.
People here glossing over one very big factor - there is already a large chip salvaging/recycling industry in China.
All the new X79, X99, etc mobos on aliexpress, taobao and so on, come from taking old decommissioned boards’ chipsets and resoldering them onto new ones. Same deal with many mobile/laptop dGPUs and CPUs, often saving functional chips from landfill. And unfortunately also behind the occurrences of those “fake” memory and NAND products.
It’s more likely MS didn’t think taking a whole bunch Geona systems out of use elsewhere would be worth it. The backlog for Genoa throughout most of h1 made them nearly as unobtainable as H100s.
Most of the CPU time in these sort of systems is usually taken up by relatively basic PCIe traffic management. More likely, SPR and Geona are basically interchangeable as far as this is concerned and SPR Xeon just had less opportunity cost.
If there was actually any special sauce that made a tangible difference with this type of setup, there would be an epic bumrush by everyone to buy up SPR Xeons to host all their H100s, but they’re clearly not. Nvidia would have also made a far bigger and more public stink over Intel’s failure to deliver SPR on time, due to DGX-H100.
Absurd motherboard prices were the main reason for Zen 4 desktop CPUs’ mediocre launch impressions.
That’s only explicitly true for Intel.
The manufacturing method for Ryzen chiplet & Epyc are basically identical, with a different IOD and packaging complexity being the only real differences, so any additional production costs predominantly down to that part instead of something related to the wafer.
Yield/binning costs cancels themselves out because a CCD, the single most expensive part to design and manufacture, has all of its costs spread across the entire Epyc & Ryzen chiplet product stack. Intel doesn’t have that luxury, since Xeon & Core-S are two different sets of designs.
Ryzen APUs are a fundamentally different design to all the other Ryzen/Epyc stack. So even if the mobile chips command a higher ASP than Ryzen chiplet, they also carry with them a higher manufacturing cost because it isn’t subsidised by being part of the CCD production line.
Comparing them to Top Gear is insulting to Top Gear.