• DYMAXIONman@alien.topB
    link
    fedilink
    English
    arrow-up
    1
    ·
    11 months ago

    From what I heard they don’t want high volume low margin gpus to take up fab capacity when they could instead use that for cpus

    • Kougar@alien.topB
      link
      fedilink
      English
      arrow-up
      1
      ·
      11 months ago

      I’ve heard that, and it’s plausible. But keep in mind the MCD’s are made on 6nm which AMD isn’t using for CPUs. Also AMD is fabricating some APUs and EPYCs on TSMC 4nm already.

      If AMD is suffering from limited wafer supply at 5nm then it absolutely has to adopt a lower volume, higher performance crown targeting approach to its GPU designs. Regardless of whatever the supply is today, wafer supply in the future is not going to be improving as everyone and everything funnels into the same future TSMC node groups.

    • HilLiedTroopsDied@alien.topB
      link
      fedilink
      English
      arrow-up
      1
      ·
      11 months ago

      Then they should have made a fatter GCD 250mm^2 vs 150mm^2 with 140 or something CU’s, and added 3d stacked cache to feed it on the MCDs. They might have even had a plan to but flaked out. Beat 4090 on raster, and compete with 4080 on RT. I was hoping RDNA4 would do just that, but the rumors of AMD only doing mainstream for RDNA4 seems the opposite.