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Joined 11 months ago
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Cake day: October 25th, 2023

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  • Not really in most cases. The decoder might need to spend some more transistors to accommodate the instructions but that should not be much. And the very oldest never used ones can be thrown to some very slow microcode rom or something. In the execution side SSE uses the same registers as the latest AVX does. And the low level compute operations actually done by the execution units are the same. You need to understand that each instruction is actually translated to one or more micro operation by the decoder, they are not direct execution control data.

    However there are some old no longer used features in x86 CPUs that do complicate the design somewhat. And there are instructions connected to those features. But that’s really not the instructions themselves using the die area. Intel’s x86s standard proposes to remove for example the middle privilege level rings and call gates from the CPUs. As well as some no longer relevant memory access modes.


  • No.

    CPU performance is always limited by some reason. In laptops it will almost always be heat, which is the same as power consumption. There is no reason not to drive the CPU as hard as it can on a given cooling and battery solution. You bought a high spec lenovo laptop which is probably configured to run as fast as possible. Did you even try to setup it otherwise?

    Typical idle use (like typing reddit) power for my old lenovo intel laptop is about 5W which results in about 8 hour battery life with this small old battery. I don’t think I ever hear the fans of the laptop unless I am running a compiler or something. I could setup it so that I would not hear the fans even then but that would cost some performance.



  • TSMC has had better low power performance but the difference isn’t massive. I suspect the main reason is a) 18A is not ready for mass production until too late and b) limited 20A capacity coming online next year is needed for other products (remember intel has to ship absolute shitload of chips). So why not do it on TSMC if that is possible and the alternative is to delay the products to wait for capacity?

    Edit: i’m not sure if 20A was again a more limited early version designed primarily for intel desktop products and 18A was supposed to be the long term version of the node with wider array of capabilities?