AMD’s chiplet strategy in laptops: balancing innovation and power efficiency. AMD says that chiplet design for mainstream mobile APUs is challenging due to power constraints. The chiplet approach has been instrumental in the success of the Ryzen CPU series. In the domain of laptops, AMD is still evaluating how to approach this idea. During a […]
On current CPUs, anything that needs CPU attention has to wake up the big cores. Ryzen only has big cores currently (Zen4C should be equal power within the frequency both cores can reach) and 12/13th gen Thread Director goes to the P-cores first. This means that every time you need to do something, there is a brief period where some power-hungry cores have to come out of whatever low-power state they use to perform that thing.
With MTL the main CPU tile can in theory stay powered-down while the LPe-cores run code outside of them. Thread Director goes to these cores first, so only tasks that need more CPU are escalated to the main CPU cores.
That is a question I can’t answer right now. It’s a wait and see both because MTL isn’t out yet, and because there are a ton of variables that can change CPU behavior in 30 tabs. Since the memory controllers are on the SoC tile, in theory they can all stay loaded, and only switching between tas would briefly hit the main CPU tile. It is also totally possible that some of those tabs are more demanding, say they leverage some hardware acceleration features of the GPU. That would involve waking that tile during interactions with the page at least.
It’s possible power plans may affect how aggressively tiles are put to sleep, in which case you could get into OEM or even model-specific behaviors that would only be comparable through reviews.
On current CPUs, anything that needs CPU attention has to wake up the big cores. Ryzen only has big cores currently (Zen4C should be equal power within the frequency both cores can reach) and 12/13th gen Thread Director goes to the P-cores first. This means that every time you need to do something, there is a brief period where some power-hungry cores have to come out of whatever low-power state they use to perform that thing.
With MTL the main CPU tile can in theory stay powered-down while the LPe-cores run code outside of them. Thread Director goes to these cores first, so only tasks that need more CPU are escalated to the main CPU cores.
That is a question I can’t answer right now. It’s a wait and see both because MTL isn’t out yet, and because there are a ton of variables that can change CPU behavior in 30 tabs. Since the memory controllers are on the SoC tile, in theory they can all stay loaded, and only switching between tas would briefly hit the main CPU tile. It is also totally possible that some of those tabs are more demanding, say they leverage some hardware acceleration features of the GPU. That would involve waking that tile during interactions with the page at least.
It’s possible power plans may affect how aggressively tiles are put to sleep, in which case you could get into OEM or even model-specific behaviors that would only be comparable through reviews.