- cross-posted to:
- hardware
- cross-posted to:
- hardware
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I’ve never understood why AMD couldn’t just release the Xbox APU for desktop which is comparable to a RTX 4070.
Neat!
about time. AMD needs the APU to eliminate the Entry class GPU’s. LEts Go.
“We will do the thing when it makes more sense to do the thing than to not do the thing.”
I dont know what that means ı want a 7940hs laptop without dpgu thats it so it can have bigger battery or cooling. I am disappointed by my vivobook.
It’ll be nice when AMD can just drop a 8Core X3D CPU, a 40CU 3d Vcache GPU, “AI” Chiplet in the same socket.
Slap in 32PCI lanes for storage and 6 unified memory channels and thank you very much.
So Strix Halo? Except it won’t be 3D V-Cache at all. Exclusive for mobile though.
It’s insane to me that AMD is currently leading the pack in power efficiency (compared to Intel) and yet they consider the chiplet approach too power inefficient for mobile.
I guess all of that efficiency lead is coming from process node alone?
They have great efficiency at 100% load. But their idle power usage would kill any battery.
AMD has had a node advantage on Intel for years now. Meteor Lake would be the first generation that they are on relatively equal grounds.
AMD has done extremely well with power consumption under load, low and high, but their idle power consumption is significantly worse.
Thats because AMD just glued together dies on their desktop CPUs to make MCM CPUs, and called them chiplets.
Eg. The thing that Intel and IBM had already done years before.
Apple’s MCM CPUs are power efficient because the dies are right next to each other, but those CPUs cost many times more than either Intel’s or AMDs CPUs.
Intel is trying to leapfrog Apple and AMD by making tiled CPUs, but the packaging method is way more complex and expensive than either of its competitors.
I always wondered if their MCDs used on RDNA3 could interface with DDR5 memory.
I know there were gt 1030 cards that used ddr4 memory I think Intel released their first discrete GPU before Arc that used ddr4 as well I thought.
Each MCD is 2x32 bit total. Could you pair 1 or 2 with an APU graphics and CPU die I wonder? The cache certainly would alleviate the bandwidth struggles keeping the graphics capabilities limited on APUs.