Arm makes money from Arm ISA from:

• License Fees
• Royalties

License Fees are an upfront payment to gain access to Arm ISA. The License Fees for ALAs (Architectural License Agreements) are far more expensive than for TLAs (Technology License Agreements, i.e. stock cores)

Royalties are a % per chip sold which are reflective of the level of Arm IP used. The Royalties for ALAs are far lower than for TLAs. That’s because TLAs holders are using far more Arm IP, whereas ALA holders design the cores/IP themselves

Overall royalties make up a far larger portion of Arm’s revenue, e.g. for 2022: $1.7B in royalties vs $1B for “non-royalties”

Hence why Arm has been increasingly concerned about the rise in ALA holders, especially Qualcomm switching back to their ALA

Sources:

Arm’s statements from SoftBank’s Annual Reports

AnandTech, it is very old but Arm hasn’t changed their business model for ages, just the termology

Here’s some more details from NextPlatform

Full NextPlatform article

Lunar Lake-MX looks like a direct response to Apple’s M Series/Qualcomm’s X Elite

Great to see Intel design a dedicated die for the 8-30W TDP market instead of just reusing their 15-28W TDP design

Although still no direct response to Apple’s M Pro/M Max with huge iGPUs yet from Intel (AMD’s Strix Halo is supposedly coming in 2025)

Note that’s the GB6 ST in Windows, it would be around 3030 for Linux which is more comparable to Android

Still I’d agree IPC isn’t amazing compared to Apple or Arm, which I guess sorta makes sense given NUVIA were originally targeting servers, where MT+efficiency is the main focus not ST

IMO how quickly Qualcomm can iterate on the X Elite will be critical to their success (that and Microsoft pulling their weight on the software front)

We’ve seen several companies release decently competitive custom Arm cores, but then fail to keep up with Arm’s rapid yearly development

E.g. Samsung’s Exynos M, NVIDIA’s Denver, and Cavium’s ThunderX2 all started reasonably competitive with Arm, but fell further and further behind in their following iterations

For CPU design, there’s no change from OG to G3. Samsung S.LSI has done all the frontend design and Google has done all the backend design

My current theory is that there is something flawed about the Tensor G3’s CPU design and the problem doesn’t stem from the processing node, which most people seem to conclude to

The main reason GoldenReviewers’ testing shows worse efficiency is because the subscore for 462.libquantum is extremely low, only 25.05, when it should be >150

It’s possibly a design flaw in hardware

But it could also be a bug in the scheduler/DVFS/something else in the BSP

So according to this LinkedIn research, the Tensor IP blocks were designed by:

• CPU (frontend): Samsung S.LSI for all
• CPU (backend): Google for all
• GPU (frontend+backend): Samsung S.LSI for OG Tensor, Google for G2-G3
• NPU/TPU (frontend+backend): Google for all
• Multimedia IP (ISP, Video Encode/Decode, Display) (frontend+backend): for the OG Tensor Google only designed the Video Encode/Decode, but starting with the G2 Google also designed the ISP and Display blocks

Seems like Google is progressively getting more involved in the design process, which makes sense if the rumours of going TSMC for the Pixel 10 are true